image_engineering_decoder_dvd-283
Differences
This shows you the differences between two versions of the page.
| Both sides previous revision Previous revision Next revision | Previous revision Last revision Both sides next revision | ||
|
image_engineering_decoder_dvd-283 [2018/04/19 21:12] telmnstr |
image_engineering_decoder_dvd-283 [2023/11/14 21:51] telmnstr |
||
|---|---|---|---|
| Line 7: | Line 7: | ||
| - This unit doesn't appear to have a CPU. The incoming data seems to clock the hardware and the data to the DACs. | - This unit doesn't appear to have a CPU. The incoming data seems to clock the hardware and the data to the DACs. | ||
| - | - The unit supports two scan heads, A and B. When B is active it cuts the scan rate in half. | + | - The unit supports two scan heads, A and B. When both are active it appears to cut the scan rate in half. |
| - The unit has 4 digital outputs in addition to X/Y/R/G/B, B1 thru B3 and a SH(utter?) | - The unit has 4 digital outputs in addition to X/Y/R/G/B, B1 thru B3 and a SH(utter?) | ||
| Line 15: | Line 15: | ||
| - The DACs for X and Y appear to be 12 bit | - The DACs for X and Y appear to be 12 bit | ||
| + | Work is underway to build a direct to computer interface to capture the data from this system. | ||
| + | |||
| + | {{ :ie_dvd_283_decoder1.jpg?800 |}} | ||
| + | |||
| + | {{ :ie_dvd_283_decoder2.jpg?800 |}} | ||
| + | |||
| + | {{ :ie_dvd_283_decoder3.jpg?800 |}} | ||
image_engineering_decoder_dvd-283.txt ยท Last modified: 2023/11/14 21:52 by telmnstr
Page Tools
Except where otherwise noted, content on this wiki is licensed under the following license: CC Attribution-Share Alike 4.0 International
