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image_engineering_decoder_dvd-283 [2018/04/19 21:12] telmnstr |
image_engineering_decoder_dvd-283 [2018/04/19 21:13] telmnstr |
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- This unit doesn't appear to have a CPU. The incoming data seems to clock the hardware and the data to the DACs. | - This unit doesn't appear to have a CPU. The incoming data seems to clock the hardware and the data to the DACs. | ||
- | - The unit supports two scan heads, A and B. When B is active it cuts the scan rate in half. | + | - The unit supports two scan heads, A and B. When both are active it appears to cut the scan rate in half. |
- The unit has 4 digital outputs in addition to X/Y/R/G/B, B1 thru B3 and a SH(utter?) | - The unit has 4 digital outputs in addition to X/Y/R/G/B, B1 thru B3 and a SH(utter?) | ||
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- The DACs for X and Y appear to be 12 bit | - The DACs for X and Y appear to be 12 bit | ||
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+ | Ethan has done some work drawing out a schematic for the DAC side to discover where to pick up the clock and serial data after it's pulled from the video signal with the idea of building a microcontroller program to take that data and push it to a computer with no loss. | ||